Enhanced Memory ME-1 for Kawai K5000
Kawai K5000W
5.2.2007
ME-1 Clone in the PCB editor.
2.3.2007
Most of the connections are routed. To be able to route all nets on the given board area, I had to utilize the finest possible dimensions offered by PCB pool service: 0,3 mm drill holes and 8 mil route width.
Next thing is to smooth the routes and remove some route detours. I will also create a test adapter from ME-1 to my USB programmer before ordering a prototype.
From the Board Status Report:
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All Min Max Total
Number of pads 6 148 154
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Layer pair codes Number of vias
(Through Hole) 80
Total 80
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Nets Mixed width nets Connections
Total number 51 79
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Percentage of routed connections to total connections 98
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16.3.2007
The design is nearly finished. The ground planes on the back side are still missing. The testing adapter is also nearly finished. I will order some prototypes next week.
5.4.2007
Today I built the first prototype.
The ME-1 Original...
...and the very first protoype of my ME-1 clone
I already did some fuctional tests, covering the battery-switchover and the low-battery-detection by the MAX691A circuit. The 5V supply current is about 1 mA. The 3V battery supply current without 5V supply is as low as 0,0002 mA - there was problem to measure this even with my 5 1/2 digit Fluke 45 DVM. With 5V supply present the battery consumption increases by 1 µA as calculated before.
The lower end of the resistor network for battery detection is connected to the MAX691A's RESET output. This is an open drain output, pulling the network to GND only when 5V is present, so just then when it's needed. The resistor current is 1µA. With the K5000 switched off there is only the PFI input's leakage current and the RESET output's leakage current, which is even not specified.
The next picture shows the testing and programming adaptor, which will connect the ME-1 clone to my USB programmer for further memory testing.
Programming and Testing adaptor
1.5.2007
My USB programmer, the ME-1 original and my prototype have fooled me for days. Here is a short report:
After finishing the reading and programming routines for my programmer there were permanent reading and verify errors, on both the original and the prototype.
Problem #1
The reset cycle of the MAX691A is of 200 ms duration. After power-up the CE (Chip Enable) line is protectetd during this time. While I begin reading immediately, a certain amount of data is missing at the beginning of the RAM area.
A little detail I overlooked in the datasheet. I will have to find out when the K5000 first accesses the ME-1 after power-up. If this time is shorter than 200 ms I will start again finding a NVRAM controller IC. The reset cycle of the original ME-1 is about 640 µs.
Problem #2
After programming a short delay before reading data, there are still verify errors. I dedected a short circuit between two address lines.
Problem #3
My USB-programmer is made for reading 16-bit devices, but programs only 8-bit devices. The data line drivers share the same 8 bit bus, so highbyte and lowbyte are always the same. For the clone this problem is solved by controlling the RAMs UB and LB lines, which is not possible for the original.
I changed my software for only reading and writing the 256k lowbytes. There were still verify errors after that, caused by another software bug.
